The present invention relates to a vector processing device which is selectively operable in a stride vector processing mode and an indirect vector processing mode. A vector processing device of the type described, comprises a stride vector processing circuit and an indirect vector processing circuit.
In the vector processing device, each of the stride vector processing circuit and the indirect vector processing circuit has a supplying circuit for supplying a stride vector and an indirect vector to a memory device used in combination with the vector processing device. Consequently, the vector processing device must comprise a large amount of hardware.